RichardBerg : CeleronVsP4

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Most recent edit on 2004-10-07 13:23:46 by client209-42-223-14.intrex.net

Additions:
Complete cheatsheet for P4-class CPUs. Ditto from Tech-Report.
More on the new Intel numbering schema according to Ars.
More on the new Intel numbering schema.
Complete cheatsheet for P4-class CPUs.
More on the new Intel numbering schema.
Short answer #2 - performance:
Long answer - architecture:
Back to IntrexFAQ


Deletions:
- Celeron D = Prescott core, 256KB full-speed L2 cache, 533MHz effective FSB, no Hyperthreading, 2.4 - 2.93GHz



Oldest known version of this page was edited on 2004-10-07 12:27:30 by client209-42-223-14.intrex.net []
Page view:
aka "it's the cache, silly"

Short answer #1 - specs:
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